Accelerometers and other types of sensors often include one or more crystal oscillators that produce a signal having a frequency that varies as a function of a measured parameter, such as acceleration. The frequency of this signal can be determined simply by counting the number of cycles of the signal occurring during a sample time of known duration. However, instrumentation used to monitor the frequency of a crystal oscillator in applications requiring high resolution typically "counts the frequency" in terms of cycles of a reference clock operating at a much higher frequency than the sensor crystal and thus avoids having to measure frequency over unacceptably long sample periods. The frequency-counting instrumentation typically includes a counter that accumulates reference clock cycles during one or more periods of a square wave signal that is input to the counter, where each period extends from a rising edge to a successive rising edge, or from a falling edge to a successive falling edge of the square wave. Even better resolution of the signal frequency is achieved in real time, during continuous frequency monitoring, by using a combination of the two techniques, i.e., by counting an integer number of cycles of the sensor signal that start during a sample time and correcting the integer number for any fractional portions of the sensor period that occur at the beginning and at the end of the sample time. The fractional portions of the sensor period are determined by counting cycles of the reference clock on additional counters.
Commonly assigned U.S. Pat. No. 4,786,861 discloses a frequency-counting apparatus and method that uses an integer cycle counter in combination with counters that determine fractional portions of a sensor signal to achieve high resolution. The integer counter accumulates the total number of sensor periods or cycles that begin during a sample time. A partial period counter accumulates reference clock cycles during the portion of a sensor signal period or cycle that immediately follows the end of a sample time, and a full period counter determines the number of reference clock cycles that occurred during that entire sensor signal period or cycle, starting from just prior to the end of the sample time. The ratio of these two counts, i.e., the partial count divided by the full count, defines a fractional portion of the sensor signal period or cycle that must be subtracted from the integer cycle count. In addition, a fractional portion of the sensor signal period, which was determined at the end of the last sample time and stored, is added to the result, yielding a corrected total count for the sample time. The frequency of the sensor signal is then determined simply by dividing the corrected total count by the known sample time.
Prior art techniques for counting the frequency of a signal cannot resolve more than .+-. one clock cycle. The process technology (e.g., CMOS, ECL) used for the circuitry employed in a frequency counter may limit the reliable maximum speed of the reference clock employed, particularly where the circuitry is exposed to wide temperature variations. Even the technique described in the above-referenced patent is thus limited in resolution. Furthermore, special circuitry for increasing the speed of the reference clock so that it operates reliably over extreme temperature ranges can be expensive to implement.
Accordingly, it is an object of the present invention to effectively double the resolution with which a frequency is counted without increasing the speed of the reference clock employed. It is a further object to accomplish the increased resolution without doubling the circuitry required. A still further object is to substantially improve the resolution with which real-time counting of the signal is achieved, without significant post processing of the results to determine a count. These and other objects and advantages of the present invention will be apparent from the attached drawings and the Description of the Preferred Embodiments that follow.